Description
Date depot: 1 janvier 1900
Titre: Development of a demonstrator of a stack-based FPGA architecture using 3D technology process
Directeur de thèse:
Habib MEHREZ (LIP6)
Domaine scientifique: Sciences et technologies de l'information et de la communication
Thématique CNRS : Non defini
Resumé:
Field Programmable Gate Arrays (FPGA) become important actors in the computational device domain that was orginally dominated by microprocessors and ASICs. FPGA designs big challenge is to find a good trade-off between flexibility and performances. Three factors combine to determine the characteristics of an FPGA: quality of its architecture, quality of the CAD tools used to map circuits into the FPGA, and its electrical technology design. This research proposal aims at exploring a development methodology of stacked FPGA architecture to improve area, density, power consumption and performance.
Doctorant.e: Pangracious Vinod