Description
Date depot: 1 janvier 1900
Titre: Reliability estimation of combinational circuits
Directrice de thèse:
Lirida NAVINER (LTCI (EDMH))
Domaine scientifique: Sciences et technologies de l'information et de la communication
Thématique CNRS : Non defini
Resumé:
Digital circuits used in such domains as automotive, medical, space or nuclear need to satisfy high reliability requirements. In addition, continous downsacling of consumer electronics consisting in increased integration and lower voltage supply, affects system's sensivity to several phenomena involved in transient and permament faults generation: particle strike, termal noise, crosstalk, etc. These faults may cause different effects in the system's behavior ranging from silent fault (no effect) to a total loss of funcinoality.
Transient faults in memories and sequential elements have largely dominated the overall soft error rate (SER) of systems, thus, correction and prevention techniques for these devices are well known, and their application is widely spread. Though, it is expected that the controbution of combinational logic elements to the system's SER becomes dominant with CMOs technology downsacling. Hence, there is a need to fulfill the lack of available models and methodologies that take into account the combinational logic's contribution to the reliability loss. Two main approaches exist to asses this issue : fault injection techniques and analytical models.
The work of this thesis is focused on the analytical approach, also known as probabilistic approach. First, an in-depth approach of the state of the art methods will be done pointing out the main limitations of probabilistic models. Second, innovative heuristic and approaches will be proposed.
Doctorant.e: Torras Flaquer Josep