Description
Date depot: 1 janvier 1900
Titre: Reliability of versatile sigma-delta analog-to-digital converters
Directeur de thèse:
Jean-Francois NAVINER (LTCI (EDMH))
Encadrant :
Hervé PETIT (LTCI (EDMH))
Domaine scientifique: Sciences et technologies de l'information et de la communication
Thématique CNRS : Non defini
Resumé:
The technology integration for electronics at the nanoscale can further enhance the integration density of digital features, while maintaining the overall consumption of circuits at reasonable levels. This trend is less favorable for analog or mixed-signal circuits. A major innovation is essential to propose and implement new circuits and new architectures for high performance, some techniques standard now proving ineffective. Moreover, it is now very difficult and thus very or too expensive to keep the manufacturing yield at which he was for micrometer technology. It becomes absolutely necessary to incorporate into a method of electronic system design architectures, tools and techniques that will still ensure robust operation, that is to say a high degree of reliability.
We propose to analyze the failure mechanisms and to define weighted and sufficiently abstract fault models for architectures of versatile discrete time sigma-delta modulators. The purpose of these models is to study the impact of failures on the functionality and performance. The work will then propose and evaluate, based on the developed models reconfiguration, fault tolerance, self-calibration, self-test and scalability techniques for these converters. Finally, a method will be proposed and evaluated for specifying the architecture of a converter by integrating reliability among the performance criteria.
Doctorant.e: Cai Hao