Projet de recherche doctoral numero :5421

Description

Date depot: 18 novembre 2018
Titre: Multi-Stage Operational Amplifiers for High-Performance Analog-to-Digital Converters
Directrice de thèse: Marie-Minerve LOUËRAT (LIP6)
Directeur de thèse: Hassan ABOUSHADY (LIP6)
Domaine scientifique: Sciences et technologies de l'information et de la communication
Thématique CNRS : Non defini

Resumé: The future 5G wireless communication systems require portable devices capable of analyzing the spectrum congestion and establishing communication on the available frequency bands using the appropriate standards. Internet of Things (IoT) applications also require transceivers capable of establishing a wireless communication using several standards in order to communicate with a wide range of wireless sensors and actuators. At UPMC, we have proposed a new low-power RF receiver architecture suitable for portable devices dedicated to cognitive radio application. This architecture is based on an RF bandpass Sigma-Delta ADC [Ashry2013][Belfort2017]. The proposed receiver architecture achieves very low-power consumption but it is still limited in terms of performance: Signal-to-Noise Ratio and linearity. The objective of this thesis is the design and implementation of high performance Bandpass Sigma-Delta ADC based on multi-stage operational amplifiers. During the 3 years duration of the thesis, Ms Doaa MAHMOUD the Ph.D. candidate is expected to accomplish the following tasks: 1- Study the operational amplifier specifications for high speed and high quality factor active resonators. 2- Study the state of the art of multi-stage operational amplifiers and high performance bandpass Sigma-Delta ADC. 3- Propose an innovative multi-stage operational amplifier for a high performance Bandpass Sigma-Delta ADC. 4- Design, implementation and measurement of the proposed high performance Bandpass Sigma-Delta ADC in a FD-SOI 28nm process. 5- Publications and Ph.D. thesis writing. [Ashry2013] A. Ashry and H. Aboushady, 'A 4th order 3.6GS/s RF Sigma-Delta ADC with a FoM of 1pJ/bit', IEEE Transactions on Circuits and Systems I, TCAS-I, Vol.60, No. 10, pp 2606 - 2617, October 2013. [Belfort2017] D. Belfort, S. Catunda, H. Aboushady, '4th order capacitively-coupled LC-based Sigma-Delta modulator', Microelectronics Journal, Springer, Volume 62, Pages 99-107, April 2017.

Doctorant.e: Mahmoud Doaa