Description
Date depot: 13 juillet 2023
Titre: Hardware Security and Trust for Mixed-Signal Integrated Circuits
Directeur de thèse:
Haralampos STRATIGOPOULOS (LIP6)
Directeur de thèse:
Hassan ABOUSHADY (LIP6)
Domaine scientifique: Sciences et technologies de l'information et de la communication
Thématique CNRS : Systèmes et architectures intégrés matériel-logiciel
Resumé: In the early days of the semiconductor industry, all the design know-how, Electronic Design Automation (EDA) tools, fabrication facilities, and test equipment required to build end-to-end an Integrated Circuit (IC) were to be found within single companies. Today, very few vertically integrated companies combining all the required competencies exist. We observe increasing globalization of the diverse design and manufacturing tasks and outsourcing to third parties. For instance, many companies are founded or have transitioned to be "fabless": they outsource the manufacturing step of their IC design to offshore foundries, many of which are located in separate continents. In this way, they do not need to bear the enormous costs of building, maintaining, and upgrading a chip manufacturing facility that costs beyond $10 billion. Another trend we observe nowadays is the rise of complex Systems-on-Chip (SoCs) where numerous general and specialized functions are integrated onto the same chip. Many companies do not have the know-how to design end-to-end a SoC, thus relying on third-party Intellectual Property (IP) cores for building some of the functions. As an example, Apple is a fabless company that procures IP cores from IP vendors including Arm, delegates fabrication to TSMC or Samsung, and product assembly/test services to Foxconn.
A major security threat resulting from this globalized supply chain is IP/IC piracy. Main scenarios are as follows:
1) A company that purchases an IP from an IP vendor to use it in a SoC can illegally reuse the IP for other SoCs without remunerating again the IP vendor.
2) An IP may be cloned and sold illegally by a rogue employee of the company.
3) Cloning of an IC or its IP sub-cores can also be performed by a foundry that receives the IC blueprint for fabrication.
4) A malicious foundry may also produce and sell chips beyond the number agreed on in the contract with the chip design owner, known as overbuilding.
5) A legally purchased chip can be subjected to reverse-engineering to extract the IC netlist and layout and other technology secrets. Nowadays, there exists increased reverse engineering capabilities even for advanced technology nodes.
6) There exist recycling facilities where functional but aged chips are scrapped from used boards, then they re-enter the market as “fresh” products.
7) Unauthorized chip use is often considered another form of piracy.
Piracy is a serious threat for the microelectronics industry (i.e., loss of revenues and know-how), governments (i.e., national security threat), and the society as a whole (i.e., counterfeit chips are less reliable). To this end, there is a pressing need for anti-piracy design methods that can protect an IP/IC against potential attackers located anywhere in the supply chain.
This PhD will target the design of mixed-signal, analog-digital ICs with built-in anti-piracy defenses. The goal will be to develop design techniques at transistor-level or at system-level that will make the IC provably resist any attempt to pirate it. Example techniques borrowed from the digital domain include locking, where the IC functionality becomes key-controlled with a secret digital key, and camouflaging or physical obfuscation, where the layout is altered in a way that it will deceive the reverse engineer.
Doctorant.e: Hammam Hazem Hassan